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    <h1>File: /Users/paulross/dev/linux/linux-3.13/arch/x86/include/asm/apicdef.h</h1>
    <p>Green shading in the line number column
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    <pre><a name="1" /><span class="Maybe">       1:</span> <span class="f">#</span><span class="n">ifndef</span> <a href="cpu.c_macros_ref.html#_X0FTTV9YODZfQVBJQ0RFRl9IXzA_"><span class="b">_ASM_X86_APICDEF_H</span></a>
<a name="2" /><span class="Maybe">       2:</span> <span class="f">#</span><span class="n">define</span> <a href="cpu.c_macros_ref.html#_X0FTTV9YODZfQVBJQ0RFRl9IXzA_"><span class="b">_ASM_X86_APICDEF_H</span></a>
<a name="3" /><span class="Maybe">       3:</span> 
<a name="4" /><span class="Maybe">       4:</span> <span class="k">/*</span>
<a name="5" /><span class="Maybe">       5:</span> <span class="k"> * Constants for various Intel APICs. (local APIC, IOAPIC, etc.)</span>
<a name="6" /><span class="Maybe">       6:</span> <span class="k"> *</span>
<a name="7" /><span class="Maybe">       7:</span> <span class="k"> * Alan Cox &lt;Alan.Cox@linux.org&gt;, 1995.</span>
<a name="8" /><span class="Maybe">       8:</span> <span class="k"> * Ingo Molnar &lt;mingo@redhat.com&gt;, 1999, 2000</span>
<a name="9" /><span class="Maybe">       9:</span> <span class="k"> */</span>
<a name="10" /><span class="Maybe">      10:</span> 
<a name="11" /><span class="Maybe">      11:</span> <span class="f">#</span><span class="n">define</span> <a href="cpu.c_macros_noref.html#_SU9fQVBJQ19ERUZBVUxUX1BIWVNfQkFTRV8w"><span class="b">IO_APIC_DEFAULT_PHYS_BASE</span></a>    <span class="c">0xfec00000</span>
<a name="12" /><span class="Maybe">      12:</span> <span class="f">#</span><span class="n">define</span>    <a href="cpu.c_macros_noref.html#_QVBJQ19ERUZBVUxUX1BIWVNfQkFTRV8w"><span class="b">APIC_DEFAULT_PHYS_BASE</span></a>        <span class="c">0xfee00000</span>
<a name="13" /><span class="Maybe">      13:</span> 
<a name="14" /><span class="Maybe">      14:</span> <span class="k">/*</span>
<a name="15" /><span class="Maybe">      15:</span> <span class="k"> * This is the IO-APIC register space as specified</span>
<a name="16" /><span class="Maybe">      16:</span> <span class="k"> * by Intel docs:</span>
<a name="17" /><span class="Maybe">      17:</span> <span class="k"> */</span>
<a name="18" /><span class="Maybe">      18:</span> <span class="f">#</span><span class="n">define</span> <a href="cpu.c_macros_noref.html#_SU9fQVBJQ19TTE9UX1NJWkVfMA__"><span class="b">IO_APIC_SLOT_SIZE</span></a>        <span class="c">1024</span>
<a name="19" /><span class="Maybe">      19:</span> 
<a name="20" /><span class="Maybe">      20:</span> <span class="f">#</span><span class="n">define</span>    <a href="cpu.c_macros_ref.html#_QVBJQ19JRF8w"><span class="b">APIC_ID</span></a>        <span class="c">0x20</span>
<a name="21" /><span class="Maybe">      21:</span> 
<a name="22" /><span class="Maybe">      22:</span> <span class="f">#</span><span class="n">define</span>    <a href="cpu.c_macros_ref.html#_QVBJQ19MVlJfMA__"><span class="b">APIC_LVR</span></a>    <span class="c">0x30</span>
<a name="23" /><span class="Maybe">      23:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19MVlJfTUFTS18w"><span class="b">APIC_LVR_MASK</span></a>        <span class="c">0xFF00FF</span>
<a name="24" /><span class="Maybe">      24:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19MVlJfRElSRUNURURfRU9JXzA_"><span class="b">APIC_LVR_DIRECTED_EOI</span></a>    <span class="f">(</span><span class="c">1</span> <span class="f">&lt;&lt;</span> <span class="c">24</span><span class="f">)</span>
<a name="25" /><span class="Maybe">      25:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_ref.html#_R0VUX0FQSUNfVkVSU0lPTl8w"><span class="b">GET_APIC_VERSION</span></a><span class="f">(</span><span class="b">x</span><span class="f">)</span>    <span class="f">(</span><span class="f">(</span><span class="b">x</span><span class="f">)</span> <span class="f">&amp;</span> <span class="c">0xFFu</span><span class="f">)</span>
<a name="26" /><span class="Maybe">      26:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_R0VUX0FQSUNfTUFYTFZUXzA_"><span class="b">GET_APIC_MAXLVT</span></a><span class="f">(</span><span class="b">x</span><span class="f">)</span>    <span class="f">(</span><span class="f">(</span><span class="f">(</span><span class="b">x</span><span class="f">)</span> <span class="f">&gt;&gt;</span> <span class="c">16</span><span class="f">)</span> <span class="f">&amp;</span> <span class="c">0xFFu</span><span class="f">)</span>
<a name="27" /><span class="False">      27:</span> <span class="f">#</span><span class="n">ifdef</span> <span class="b">CONFIG_X86_32</span>
<a name="28" /><span class="False">      28:</span> <span class="f">#</span>  <span class="n">define</span>    <a href="cpu.c_macros_noref.html#_QVBJQ19JTlRFR1JBVEVEXzA_"><span class="b">APIC_INTEGRATED</span></a><span class="f">(</span><span class="b">x</span><span class="f">)</span>    <span class="f">(</span><span class="f">(</span><span class="b">x</span><span class="f">)</span> <span class="f">&amp;</span> <span class="c">0xF0u</span><span class="f">)</span>
<a name="29" /><span class="Maybe">      29:</span> <span class="f">#</span><span class="n">else</span>
<a name="30" /><span class="Maybe">      30:</span> <span class="f">#</span>  <span class="n">define</span>    <a href="cpu.c_macros_noref.html#_QVBJQ19JTlRFR1JBVEVEXzA_"><span class="b">APIC_INTEGRATED</span></a><span class="f">(</span><span class="b">x</span><span class="f">)</span>    <span class="f">(</span><span class="c">1</span><span class="f">)</span>
<a name="31" /><span class="Maybe">      31:</span> <span class="f">#</span><span class="n">endif</span>
<a name="32" /><span class="Maybe">      32:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_ref.html#_QVBJQ19YQVBJQ18w"><span class="b">APIC_XAPIC</span></a><span class="f">(</span><span class="b">x</span><span class="f">)</span>        <span class="f">(</span><span class="f">(</span><span class="b">x</span><span class="f">)</span> <span class="f">&gt;=</span> <span class="c">0x14</span><span class="f">)</span>
<a name="33" /><span class="Maybe">      33:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19FWFRfU1BBQ0VfMA__"><span class="b">APIC_EXT_SPACE</span></a><span class="f">(</span><span class="b">x</span><span class="f">)</span>    <span class="f">(</span><span class="f">(</span><span class="b">x</span><span class="f">)</span> <span class="f">&amp;</span> <span class="c">0x80000000</span><span class="f">)</span>
<a name="34" /><span class="Maybe">      34:</span> <span class="f">#</span><span class="n">define</span>    <a href="cpu.c_macros_noref.html#_QVBJQ19UQVNLUFJJXzA_"><span class="b">APIC_TASKPRI</span></a>    <span class="c">0x80</span>
<a name="35" /><span class="Maybe">      35:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19UUFJJX01BU0tfMA__"><span class="b">APIC_TPRI_MASK</span></a>        <span class="c">0xFFu</span>
<a name="36" /><span class="Maybe">      36:</span> <span class="f">#</span><span class="n">define</span>    <a href="cpu.c_macros_noref.html#_QVBJQ19BUkJQUklfMA__"><span class="b">APIC_ARBPRI</span></a>    <span class="c">0x90</span>
<a name="37" /><span class="Maybe">      37:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19BUkJQUklfTUFTS18w"><span class="b">APIC_ARBPRI_MASK</span></a>    <span class="c">0xFFu</span>
<a name="38" /><span class="Maybe">      38:</span> <span class="f">#</span><span class="n">define</span>    <a href="cpu.c_macros_noref.html#_QVBJQ19QUk9DUFJJXzA_"><span class="b">APIC_PROCPRI</span></a>    <span class="c">0xA0</span>
<a name="39" /><span class="Maybe">      39:</span> <span class="f">#</span><span class="n">define</span>    <a href="cpu.c_macros_ref.html#_QVBJQ19FT0lfMA__"><span class="b">APIC_EOI</span></a>    <span class="c">0xB0</span>
<a name="40" /><span class="Maybe">      40:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_ref.html#_QVBJQ19FT0lfQUNLXzA_"><span class="b">APIC_EOI_ACK</span></a>        <span class="c">0x0</span> <span class="k">/* Docs say 0 for future compat. */</span>
<a name="41" /><span class="Maybe">      41:</span> <span class="f">#</span><span class="n">define</span>    <a href="cpu.c_macros_noref.html#_QVBJQ19SUlJfMA__"><span class="b">APIC_RRR</span></a>    <span class="c">0xC0</span>
<a name="42" /><span class="Maybe">      42:</span> <span class="f">#</span><span class="n">define</span>    <a href="cpu.c_macros_ref.html#_QVBJQ19MRFJfMA__"><span class="b">APIC_LDR</span></a>    <span class="c">0xD0</span>
<a name="43" /><span class="Maybe">      43:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19MRFJfTUFTS18w"><span class="b">APIC_LDR_MASK</span></a>        <span class="f">(</span><span class="c">0xFFu</span> <span class="f">&lt;&lt;</span> <span class="c">24</span><span class="f">)</span>
<a name="44" /><span class="Maybe">      44:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_R0VUX0FQSUNfTE9HSUNBTF9JRF8w"><span class="b">GET_APIC_LOGICAL_ID</span></a><span class="f">(</span><span class="b">x</span><span class="f">)</span>    <span class="f">(</span><span class="f">(</span><span class="f">(</span><span class="b">x</span><span class="f">)</span> <span class="f">&gt;&gt;</span> <span class="c">24</span><span class="f">)</span> <span class="f">&amp;</span> <span class="c">0xFFu</span><span class="f">)</span>
<a name="45" /><span class="Maybe">      45:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_U0VUX0FQSUNfTE9HSUNBTF9JRF8w"><span class="b">SET_APIC_LOGICAL_ID</span></a><span class="f">(</span><span class="b">x</span><span class="f">)</span>    <span class="f">(</span><span class="f">(</span><span class="f">(</span><span class="b">x</span><span class="f">)</span> <span class="f">&lt;&lt;</span> <span class="c">24</span><span class="f">)</span><span class="f">)</span>
<a name="46" /><span class="Maybe">      46:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_ref.html#_QVBJQ19BTExfQ1BVU18w"><span class="b">APIC_ALL_CPUS</span></a>        <span class="c">0xFFu</span>
<a name="47" /><span class="Maybe">      47:</span> <span class="f">#</span><span class="n">define</span>    <a href="cpu.c_macros_ref.html#_QVBJQ19ERlJfMA__"><span class="b">APIC_DFR</span></a>    <span class="c">0xE0</span>
<a name="48" /><span class="Maybe">      48:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19ERlJfQ0xVU1RFUl8w"><span class="b">APIC_DFR_CLUSTER</span></a>        <span class="c">0x0FFFFFFFul</span>
<a name="49" /><span class="Maybe">      49:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19ERlJfRkxBVF8w"><span class="b">APIC_DFR_FLAT</span></a>            <span class="c">0xFFFFFFFFul</span>
<a name="50" /><span class="Maybe">      50:</span> <span class="f">#</span><span class="n">define</span>    <a href="cpu.c_macros_noref.html#_QVBJQ19TUElWXzA_"><span class="b">APIC_SPIV</span></a>    <span class="c">0xF0</span>
<a name="51" /><span class="Maybe">      51:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19TUElWX0RJUkVDVEVEX0VPSV8w"><span class="b">APIC_SPIV_DIRECTED_EOI</span></a>        <span class="f">(</span><span class="c">1</span> <span class="f">&lt;&lt;</span> <span class="c">12</span><span class="f">)</span>
<a name="52" /><span class="Maybe">      52:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19TUElWX0ZPQ1VTX0RJU0FCTEVEXzA_"><span class="b">APIC_SPIV_FOCUS_DISABLED</span></a>    <span class="f">(</span><span class="c">1</span> <span class="f">&lt;&lt;</span> <span class="c">9</span><span class="f">)</span>
<a name="53" /><span class="Maybe">      53:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19TUElWX0FQSUNfRU5BQkxFRF8w"><span class="b">APIC_SPIV_APIC_ENABLED</span></a>        <span class="f">(</span><span class="c">1</span> <span class="f">&lt;&lt;</span> <span class="c">8</span><span class="f">)</span>
<a name="54" /><span class="Maybe">      54:</span> <span class="f">#</span><span class="n">define</span>    <a href="cpu.c_macros_noref.html#_QVBJQ19JU1JfMA__"><span class="b">APIC_ISR</span></a>    <span class="c">0x100</span>
<a name="55" /><span class="Maybe">      55:</span> <span class="f">#</span><span class="n">define</span>    <a href="cpu.c_macros_noref.html#_QVBJQ19JU1JfTlJfMA__"><span class="b">APIC_ISR_NR</span></a>     <span class="c">0x8</span>     <span class="k">/* Number of 32 bit ISR registers. */</span>
<a name="56" /><span class="Maybe">      56:</span> <span class="f">#</span><span class="n">define</span>    <a href="cpu.c_macros_noref.html#_QVBJQ19UTVJfMA__"><span class="b">APIC_TMR</span></a>    <span class="c">0x180</span>
<a name="57" /><span class="Maybe">      57:</span> <span class="f">#</span><span class="n">define</span>    <a href="cpu.c_macros_noref.html#_QVBJQ19JUlJfMA__"><span class="b">APIC_IRR</span></a>    <span class="c">0x200</span>
<a name="58" /><span class="Maybe">      58:</span> <span class="f">#</span><span class="n">define</span>    <a href="cpu.c_macros_noref.html#_QVBJQ19FU1JfMA__"><span class="b">APIC_ESR</span></a>    <span class="c">0x280</span>
<a name="59" /><span class="Maybe">      59:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19FU1JfU0VORF9DU18w"><span class="b">APIC_ESR_SEND_CS</span></a>    <span class="c">0x00001</span>
<a name="60" /><span class="Maybe">      60:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19FU1JfUkVDVl9DU18w"><span class="b">APIC_ESR_RECV_CS</span></a>    <span class="c">0x00002</span>
<a name="61" /><span class="Maybe">      61:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19FU1JfU0VORF9BQ0NfMA__"><span class="b">APIC_ESR_SEND_ACC</span></a>    <span class="c">0x00004</span>
<a name="62" /><span class="Maybe">      62:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19FU1JfUkVDVl9BQ0NfMA__"><span class="b">APIC_ESR_RECV_ACC</span></a>    <span class="c">0x00008</span>
<a name="63" /><span class="Maybe">      63:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19FU1JfU0VORElMTF8w"><span class="b">APIC_ESR_SENDILL</span></a>    <span class="c">0x00020</span>
<a name="64" /><span class="Maybe">      64:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19FU1JfUkVDVklMTF8w"><span class="b">APIC_ESR_RECVILL</span></a>    <span class="c">0x00040</span>
<a name="65" /><span class="Maybe">      65:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19FU1JfSUxMUkVHQV8w"><span class="b">APIC_ESR_ILLREGA</span></a>    <span class="c">0x00080</span>
<a name="66" /><span class="Maybe">      66:</span> <span class="f">#</span><span class="n">define</span>     <a href="cpu.c_macros_noref.html#_QVBJQ19MVlRDTUNJXzA_"><span class="b">APIC_LVTCMCI</span></a>    <span class="c">0x2f0</span>
<a name="67" /><span class="Maybe">      67:</span> <span class="f">#</span><span class="n">define</span>    <a href="cpu.c_macros_ref.html#_QVBJQ19JQ1JfMA__"><span class="b">APIC_ICR</span></a>    <span class="c">0x300</span>
<a name="68" /><span class="Maybe">      68:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19ERVNUX1NFTEZfMA__"><span class="b">APIC_DEST_SELF</span></a>        <span class="c">0x40000</span>
<a name="69" /><span class="Maybe">      69:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19ERVNUX0FMTElOQ18w"><span class="b">APIC_DEST_ALLINC</span></a>    <span class="c">0x80000</span>
<a name="70" /><span class="Maybe">      70:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19ERVNUX0FMTEJVVF8w"><span class="b">APIC_DEST_ALLBUT</span></a>    <span class="c">0xC0000</span>
<a name="71" /><span class="Maybe">      71:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19JQ1JfUlJfTUFTS18w"><span class="b">APIC_ICR_RR_MASK</span></a>    <span class="c">0x30000</span>
<a name="72" /><span class="Maybe">      72:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19JQ1JfUlJfSU5WQUxJRF8w"><span class="b">APIC_ICR_RR_INVALID</span></a>    <span class="c">0x00000</span>
<a name="73" /><span class="Maybe">      73:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19JQ1JfUlJfSU5QUk9HXzA_"><span class="b">APIC_ICR_RR_INPROG</span></a>    <span class="c">0x10000</span>
<a name="74" /><span class="Maybe">      74:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19JQ1JfUlJfVkFMSURfMA__"><span class="b">APIC_ICR_RR_VALID</span></a>    <span class="c">0x20000</span>
<a name="75" /><span class="Maybe">      75:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19JTlRfTEVWRUxUUklHXzA_"><span class="b">APIC_INT_LEVELTRIG</span></a>    <span class="c">0x08000</span>
<a name="76" /><span class="Maybe">      76:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19JTlRfQVNTRVJUXzA_"><span class="b">APIC_INT_ASSERT</span></a>        <span class="c">0x04000</span>
<a name="77" /><span class="Maybe">      77:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19JQ1JfQlVTWV8w"><span class="b">APIC_ICR_BUSY</span></a>        <span class="c">0x01000</span>
<a name="78" /><span class="Maybe">      78:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19ERVNUX0xPR0lDQUxfMA__"><span class="b">APIC_DEST_LOGICAL</span></a>    <span class="c">0x00800</span>
<a name="79" /><span class="Maybe">      79:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19ERVNUX1BIWVNJQ0FMXzA_"><span class="b">APIC_DEST_PHYSICAL</span></a>    <span class="c">0x00000</span>
<a name="80" /><span class="Maybe">      80:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19ETV9GSVhFRF8w"><span class="b">APIC_DM_FIXED</span></a>        <span class="c">0x00000</span>
<a name="81" /><span class="Maybe">      81:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19ETV9GSVhFRF9NQVNLXzA_"><span class="b">APIC_DM_FIXED_MASK</span></a>    <span class="c">0x00700</span>
<a name="82" /><span class="Maybe">      82:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19ETV9MT1dFU1RfMA__"><span class="b">APIC_DM_LOWEST</span></a>        <span class="c">0x00100</span>
<a name="83" /><span class="Maybe">      83:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19ETV9TTUlfMA__"><span class="b">APIC_DM_SMI</span></a>        <span class="c">0x00200</span>
<a name="84" /><span class="Maybe">      84:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19ETV9SRU1SRF8w"><span class="b">APIC_DM_REMRD</span></a>        <span class="c">0x00300</span>
<a name="85" /><span class="Maybe">      85:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19ETV9OTUlfMA__"><span class="b">APIC_DM_NMI</span></a>        <span class="c">0x00400</span>
<a name="86" /><span class="Maybe">      86:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19ETV9JTklUXzA_"><span class="b">APIC_DM_INIT</span></a>        <span class="c">0x00500</span>
<a name="87" /><span class="Maybe">      87:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19ETV9TVEFSVFVQXzA_"><span class="b">APIC_DM_STARTUP</span></a>        <span class="c">0x00600</span>
<a name="88" /><span class="Maybe">      88:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19ETV9FWFRJTlRfMA__"><span class="b">APIC_DM_EXTINT</span></a>        <span class="c">0x00700</span>
<a name="89" /><span class="Maybe">      89:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19WRUNUT1JfTUFTS18w"><span class="b">APIC_VECTOR_MASK</span></a>    <span class="c">0x000FF</span>
<a name="90" /><span class="Maybe">      90:</span> <span class="f">#</span><span class="n">define</span>    <a href="cpu.c_macros_noref.html#_QVBJQ19JQ1IyXzA_"><span class="b">APIC_ICR2</span></a>    <span class="c">0x310</span>
<a name="91" /><span class="Maybe">      91:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_R0VUX0FQSUNfREVTVF9GSUVMRF8w"><span class="b">GET_APIC_DEST_FIELD</span></a><span class="f">(</span><span class="b">x</span><span class="f">)</span>    <span class="f">(</span><span class="f">(</span><span class="f">(</span><span class="b">x</span><span class="f">)</span> <span class="f">&gt;&gt;</span> <span class="c">24</span><span class="f">)</span> <span class="f">&amp;</span> <span class="c">0xFF</span><span class="f">)</span>
<a name="92" /><span class="Maybe">      92:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_U0VUX0FQSUNfREVTVF9GSUVMRF8w"><span class="b">SET_APIC_DEST_FIELD</span></a><span class="f">(</span><span class="b">x</span><span class="f">)</span>    <span class="f">(</span><span class="f">(</span><span class="b">x</span><span class="f">)</span> <span class="f">&lt;&lt;</span> <span class="c">24</span><span class="f">)</span>
<a name="93" /><span class="Maybe">      93:</span> <span class="f">#</span><span class="n">define</span>    <a href="cpu.c_macros_noref.html#_QVBJQ19MVlRUXzA_"><span class="b">APIC_LVTT</span></a>    <span class="c">0x320</span>
<a name="94" /><span class="Maybe">      94:</span> <span class="f">#</span><span class="n">define</span>    <a href="cpu.c_macros_noref.html#_QVBJQ19MVlRUSE1SXzA_"><span class="b">APIC_LVTTHMR</span></a>    <span class="c">0x330</span>
<a name="95" /><span class="Maybe">      95:</span> <span class="f">#</span><span class="n">define</span>    <a href="cpu.c_macros_noref.html#_QVBJQ19MVlRQQ18w"><span class="b">APIC_LVTPC</span></a>    <span class="c">0x340</span>
<a name="96" /><span class="Maybe">      96:</span> <span class="f">#</span><span class="n">define</span>    <a href="cpu.c_macros_noref.html#_QVBJQ19MVlQwXzA_"><span class="b">APIC_LVT0</span></a>    <span class="c">0x350</span>
<a name="97" /><span class="Maybe">      97:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19MVlRfVElNRVJfQkFTRV9NQVNLXzA_"><span class="b">APIC_LVT_TIMER_BASE_MASK</span></a>    <span class="f">(</span><span class="c">0x3</span> <span class="f">&lt;&lt;</span> <span class="c">18</span><span class="f">)</span>
<a name="98" /><span class="Maybe">      98:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_R0VUX0FQSUNfVElNRVJfQkFTRV8w"><span class="b">GET_APIC_TIMER_BASE</span></a><span class="f">(</span><span class="b">x</span><span class="f">)</span>        <span class="f">(</span><span class="f">(</span><span class="f">(</span><span class="b">x</span><span class="f">)</span> <span class="f">&gt;&gt;</span> <span class="c">18</span><span class="f">)</span> <span class="f">&amp;</span> <span class="c">0x3</span><span class="f">)</span>
<a name="99" /><span class="Maybe">      99:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_U0VUX0FQSUNfVElNRVJfQkFTRV8w"><span class="b">SET_APIC_TIMER_BASE</span></a><span class="f">(</span><span class="b">x</span><span class="f">)</span>        <span class="f">(</span><span class="f">(</span><span class="f">(</span><span class="b">x</span><span class="f">)</span> <span class="f">&lt;&lt;</span> <span class="c">18</span><span class="f">)</span><span class="f">)</span>
<a name="100" /><span class="Maybe">     100:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19USU1FUl9CQVNFX0NMS0lOXzA_"><span class="b">APIC_TIMER_BASE_CLKIN</span></a>        <span class="c">0x0</span>
<a name="101" /><span class="Maybe">     101:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19USU1FUl9CQVNFX1RNQkFTRV8w"><span class="b">APIC_TIMER_BASE_TMBASE</span></a>        <span class="c">0x1</span>
<a name="102" /><span class="Maybe">     102:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19USU1FUl9CQVNFX0RJVl8w"><span class="b">APIC_TIMER_BASE_DIV</span></a>        <span class="c">0x2</span>
<a name="103" /><span class="Maybe">     103:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19MVlRfVElNRVJfT05FU0hPVF8w"><span class="b">APIC_LVT_TIMER_ONESHOT</span></a>        <span class="f">(</span><span class="c">0</span> <span class="f">&lt;&lt;</span> <span class="c">17</span><span class="f">)</span>
<a name="104" /><span class="Maybe">     104:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19MVlRfVElNRVJfUEVSSU9ESUNfMA__"><span class="b">APIC_LVT_TIMER_PERIODIC</span></a>        <span class="f">(</span><span class="c">1</span> <span class="f">&lt;&lt;</span> <span class="c">17</span><span class="f">)</span>
<a name="105" /><span class="Maybe">     105:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19MVlRfVElNRVJfVFNDREVBRExJTkVfMA__"><span class="b">APIC_LVT_TIMER_TSCDEADLINE</span></a>    <span class="f">(</span><span class="c">2</span> <span class="f">&lt;&lt;</span> <span class="c">17</span><span class="f">)</span>
<a name="106" /><span class="Maybe">     106:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19MVlRfTUFTS0VEXzA_"><span class="b">APIC_LVT_MASKED</span></a>            <span class="f">(</span><span class="c">1</span> <span class="f">&lt;&lt;</span> <span class="c">16</span><span class="f">)</span>
<a name="107" /><span class="Maybe">     107:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19MVlRfTEVWRUxfVFJJR0dFUl8w"><span class="b">APIC_LVT_LEVEL_TRIGGER</span></a>        <span class="f">(</span><span class="c">1</span> <span class="f">&lt;&lt;</span> <span class="c">15</span><span class="f">)</span>
<a name="108" /><span class="Maybe">     108:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19MVlRfUkVNT1RFX0lSUl8w"><span class="b">APIC_LVT_REMOTE_IRR</span></a>        <span class="f">(</span><span class="c">1</span> <span class="f">&lt;&lt;</span> <span class="c">14</span><span class="f">)</span>
<a name="109" /><span class="Maybe">     109:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19JTlBVVF9QT0xBUklUWV8w"><span class="b">APIC_INPUT_POLARITY</span></a>        <span class="f">(</span><span class="c">1</span> <span class="f">&lt;&lt;</span> <span class="c">13</span><span class="f">)</span>
<a name="110" /><span class="Maybe">     110:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19TRU5EX1BFTkRJTkdfMA__"><span class="b">APIC_SEND_PENDING</span></a>        <span class="f">(</span><span class="c">1</span> <span class="f">&lt;&lt;</span> <span class="c">12</span><span class="f">)</span>
<a name="111" /><span class="Maybe">     111:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19NT0RFX01BU0tfMA__"><span class="b">APIC_MODE_MASK</span></a>            <span class="c">0x700</span>
<a name="112" /><span class="Maybe">     112:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_R0VUX0FQSUNfREVMSVZFUllfTU9ERV8w"><span class="b">GET_APIC_DELIVERY_MODE</span></a><span class="f">(</span><span class="b">x</span><span class="f">)</span>    <span class="f">(</span><span class="f">(</span><span class="f">(</span><span class="b">x</span><span class="f">)</span> <span class="f">&gt;&gt;</span> <span class="c">8</span><span class="f">)</span> <span class="f">&amp;</span> <span class="c">0x7</span><span class="f">)</span>
<a name="113" /><span class="Maybe">     113:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_U0VUX0FQSUNfREVMSVZFUllfTU9ERV8w"><span class="b">SET_APIC_DELIVERY_MODE</span></a><span class="f">(</span><span class="b">x</span><span class="f">,</span> <span class="b">y</span><span class="f">)</span>    <span class="f">(</span><span class="f">(</span><span class="f">(</span><span class="b">x</span><span class="f">)</span> <span class="f">&amp;</span> <span class="f">~</span><span class="c">0x700</span><span class="f">)</span> <span class="f">|</span> <span class="f">(</span><span class="f">(</span><span class="b">y</span><span class="f">)</span> <span class="f">&lt;&lt;</span> <span class="c">8</span><span class="f">)</span><span class="f">)</span>
<a name="114" /><span class="Maybe">     114:</span> <span class="f">#</span><span class="n">define</span>            <a href="cpu.c_macros_noref.html#_QVBJQ19NT0RFX0ZJWEVEXzA_"><span class="b">APIC_MODE_FIXED</span></a>        <span class="c">0x0</span>
<a name="115" /><span class="Maybe">     115:</span> <span class="f">#</span><span class="n">define</span>            <a href="cpu.c_macros_noref.html#_QVBJQ19NT0RFX05NSV8w"><span class="b">APIC_MODE_NMI</span></a>        <span class="c">0x4</span>
<a name="116" /><span class="Maybe">     116:</span> <span class="f">#</span><span class="n">define</span>            <a href="cpu.c_macros_noref.html#_QVBJQ19NT0RFX0VYVElOVF8w"><span class="b">APIC_MODE_EXTINT</span></a>    <span class="c">0x7</span>
<a name="117" /><span class="Maybe">     117:</span> <span class="f">#</span><span class="n">define</span>    <a href="cpu.c_macros_noref.html#_QVBJQ19MVlQxXzA_"><span class="b">APIC_LVT1</span></a>    <span class="c">0x360</span>
<a name="118" /><span class="Maybe">     118:</span> <span class="f">#</span><span class="n">define</span>    <a href="cpu.c_macros_noref.html#_QVBJQ19MVlRFUlJfMA__"><span class="b">APIC_LVTERR</span></a>    <span class="c">0x370</span>
<a name="119" /><span class="Maybe">     119:</span> <span class="f">#</span><span class="n">define</span>    <a href="cpu.c_macros_noref.html#_QVBJQ19UTUlDVF8w"><span class="b">APIC_TMICT</span></a>    <span class="c">0x380</span>
<a name="120" /><span class="Maybe">     120:</span> <span class="f">#</span><span class="n">define</span>    <a href="cpu.c_macros_noref.html#_QVBJQ19UTUNDVF8w"><span class="b">APIC_TMCCT</span></a>    <span class="c">0x390</span>
<a name="121" /><span class="Maybe">     121:</span> <span class="f">#</span><span class="n">define</span>    <a href="cpu.c_macros_noref.html#_QVBJQ19URENSXzA_"><span class="b">APIC_TDCR</span></a>    <span class="c">0x3E0</span>
<a name="122" /><span class="Maybe">     122:</span> <span class="f">#</span><span class="n">define</span> <a href="cpu.c_macros_noref.html#_QVBJQ19TRUxGX0lQSV8w"><span class="b">APIC_SELF_IPI</span></a>    <span class="c">0x3F0</span>
<a name="123" /><span class="Maybe">     123:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19URFJfRElWX1RNQkFTRV8w"><span class="b">APIC_TDR_DIV_TMBASE</span></a>    <span class="f">(</span><span class="c">1</span> <span class="f">&lt;&lt;</span> <span class="c">2</span><span class="f">)</span>
<a name="124" /><span class="Maybe">     124:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19URFJfRElWXzFfMA__"><span class="b">APIC_TDR_DIV_1</span></a>        <span class="c">0xB</span>
<a name="125" /><span class="Maybe">     125:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19URFJfRElWXzJfMA__"><span class="b">APIC_TDR_DIV_2</span></a>        <span class="c">0x0</span>
<a name="126" /><span class="Maybe">     126:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19URFJfRElWXzRfMA__"><span class="b">APIC_TDR_DIV_4</span></a>        <span class="c">0x1</span>
<a name="127" /><span class="Maybe">     127:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19URFJfRElWXzhfMA__"><span class="b">APIC_TDR_DIV_8</span></a>        <span class="c">0x2</span>
<a name="128" /><span class="Maybe">     128:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19URFJfRElWXzE2XzA_"><span class="b">APIC_TDR_DIV_16</span></a>        <span class="c">0x3</span>
<a name="129" /><span class="Maybe">     129:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19URFJfRElWXzMyXzA_"><span class="b">APIC_TDR_DIV_32</span></a>        <span class="c">0x8</span>
<a name="130" /><span class="Maybe">     130:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19URFJfRElWXzY0XzA_"><span class="b">APIC_TDR_DIV_64</span></a>        <span class="c">0x9</span>
<a name="131" /><span class="Maybe">     131:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19URFJfRElWXzEyOF8w"><span class="b">APIC_TDR_DIV_128</span></a>    <span class="c">0xA</span>
<a name="132" /><span class="Maybe">     132:</span> <span class="f">#</span><span class="n">define</span>    <a href="cpu.c_macros_noref.html#_QVBJQ19FRkVBVF8w"><span class="b">APIC_EFEAT</span></a>    <span class="c">0x400</span>
<a name="133" /><span class="Maybe">     133:</span> <span class="f">#</span><span class="n">define</span>    <a href="cpu.c_macros_noref.html#_QVBJQ19FQ1RSTF8w"><span class="b">APIC_ECTRL</span></a>    <span class="c">0x410</span>
<a name="134" /><span class="Maybe">     134:</span> <span class="f">#</span><span class="n">define</span> <a href="cpu.c_macros_noref.html#_QVBJQ19FSUxWVG5fMA__"><span class="b">APIC_EILVTn</span></a><span class="f">(</span><span class="b">n</span><span class="f">)</span>    <span class="f">(</span><span class="c">0x500</span> <span class="f">+</span> <span class="c">0x10</span> <span class="f">*</span> <span class="b">n</span><span class="f">)</span>
<a name="135" /><span class="Maybe">     135:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19FSUxWVF9OUl9BTURfSzhfMA__"><span class="b">APIC_EILVT_NR_AMD_K8</span></a>    <span class="c">1</span>    <span class="k">/* # of extended interrupts */</span>
<a name="136" /><span class="Maybe">     136:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19FSUxWVF9OUl9BTURfMTBIXzA_"><span class="b">APIC_EILVT_NR_AMD_10H</span></a>    <span class="c">4</span>
<a name="137" /><span class="Maybe">     137:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19FSUxWVF9OUl9NQVhfMA__"><span class="b">APIC_EILVT_NR_MAX</span></a>    <a href="cpu.c_macros_noref.html#_QVBJQ19FSUxWVF9OUl9BTURfMTBIXzA_"><span class="b">APIC_EILVT_NR_AMD_10H</span></a>
<a name="138" /><span class="Maybe">     138:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19FSUxWVF9MVlRPRkZfMA__"><span class="b">APIC_EILVT_LVTOFF</span></a><span class="f">(</span><span class="b">x</span><span class="f">)</span>    <span class="f">(</span><span class="f">(</span><span class="f">(</span><span class="b">x</span><span class="f">)</span> <span class="f">&gt;&gt;</span> <span class="c">4</span><span class="f">)</span> <span class="f">&amp;</span> <span class="c">0xF</span><span class="f">)</span>
<a name="139" /><span class="Maybe">     139:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19FSUxWVF9NU0dfRklYXzA_"><span class="b">APIC_EILVT_MSG_FIX</span></a>    <span class="c">0x0</span>
<a name="140" /><span class="Maybe">     140:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19FSUxWVF9NU0dfU01JXzA_"><span class="b">APIC_EILVT_MSG_SMI</span></a>    <span class="c">0x2</span>
<a name="141" /><span class="Maybe">     141:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19FSUxWVF9NU0dfTk1JXzA_"><span class="b">APIC_EILVT_MSG_NMI</span></a>    <span class="c">0x4</span>
<a name="142" /><span class="Maybe">     142:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19FSUxWVF9NU0dfRVhUXzA_"><span class="b">APIC_EILVT_MSG_EXT</span></a>    <span class="c">0x7</span>
<a name="143" /><span class="Maybe">     143:</span> <span class="f">#</span><span class="n">define</span>        <a href="cpu.c_macros_noref.html#_QVBJQ19FSUxWVF9NQVNLRURfMA__"><span class="b">APIC_EILVT_MASKED</span></a>    <span class="f">(</span><span class="c">1</span> <span class="f">&lt;&lt;</span> <span class="c">16</span><span class="f">)</span>
<a name="144" /><span class="Maybe">     144:</span> 
<a name="145" /><span class="Maybe">     145:</span> <span class="f">#</span><span class="n">define</span> <a href="cpu.c_macros_ref.html#_QVBJQ19CQVNFXzA_"><span class="b">APIC_BASE</span></a> <span class="f">(</span><span class="b">fix_to_virt</span><span class="f">(</span><span class="b">FIX_APIC_BASE</span><span class="f">)</span><span class="f">)</span>
<a name="146" /><span class="Maybe">     146:</span> <span class="f">#</span><span class="n">define</span> <a href="cpu.c_macros_ref.html#_QVBJQ19CQVNFX01TUl8w"><span class="b">APIC_BASE_MSR</span></a>    <span class="c">0x800</span>
<a name="147" /><span class="Maybe">     147:</span> <span class="f">#</span><span class="n">define</span> <a href="cpu.c_macros_noref.html#_WEFQSUNfRU5BQkxFXzA_"><span class="b">XAPIC_ENABLE</span></a>    <span class="f">(</span><span class="c">1UL</span> <span class="f">&lt;&lt;</span> <span class="c">11</span><span class="f">)</span>
<a name="148" /><span class="Maybe">     148:</span> <span class="f">#</span><span class="n">define</span> <a href="cpu.c_macros_ref.html#_WDJBUElDX0VOQUJMRV8w"><span class="b">X2APIC_ENABLE</span></a>    <span class="f">(</span><span class="c">1UL</span> <span class="f">&lt;&lt;</span> <span class="c">10</span><span class="f">)</span>
<a name="149" /><span class="Maybe">     149:</span> 
<a name="150" /><span class="False">     150:</span> <span class="f">#</span><span class="n">ifdef</span> <span class="b">CONFIG_X86_32</span>
<a name="151" /><span class="False">     151:</span> <span class="f">#</span> <span class="n">define</span> <a href="cpu.c_macros_ref.html#_TUFYX0lPX0FQSUNTXzA_"><span class="b">MAX_IO_APICS</span></a> <span class="c">64</span>
<a name="152" /><span class="False">     152:</span> <span class="f">#</span> <span class="n">define</span> <a href="cpu.c_macros_ref.html#_TUFYX0xPQ0FMX0FQSUNfMA__"><span class="b">MAX_LOCAL_APIC</span></a> <span class="c">256</span>
<a name="153" /><span class="Maybe">     153:</span> <span class="f">#</span><span class="n">else</span>
<a name="154" /><span class="Maybe">     154:</span> <span class="f">#</span> <span class="n">define</span> <a href="cpu.c_macros_ref.html#_TUFYX0lPX0FQSUNTXzA_"><span class="b">MAX_IO_APICS</span></a> <span class="c">128</span>
<a name="155" /><span class="Maybe">     155:</span> <span class="f">#</span> <span class="n">define</span> <a href="cpu.c_macros_ref.html#_TUFYX0xPQ0FMX0FQSUNfMA__"><span class="b">MAX_LOCAL_APIC</span></a> <span class="c">32768</span>
<a name="156" /><span class="Maybe">     156:</span> <span class="f">#</span><span class="n">endif</span>
<a name="157" /><span class="Maybe">     157:</span> 
<a name="158" /><span class="Maybe">     158:</span> <span class="k">/*</span>
<a name="159" /><span class="Maybe">     159:</span> <span class="k"> * All x86-64 systems are xAPIC compatible.</span>
<a name="160" /><span class="Maybe">     160:</span> <span class="k"> * In the following, &quot;apicid&quot; is a physical APIC ID.</span>
<a name="161" /><span class="Maybe">     161:</span> <span class="k"> */</span>
<a name="162" /><span class="Maybe">     162:</span> <span class="f">#</span><span class="n">define</span> <a href="cpu.c_macros_noref.html#_WEFQSUNfREVTVF9DUFVTX1NISUZUXzA_"><span class="b">XAPIC_DEST_CPUS_SHIFT</span></a>    <span class="c">4</span>
<a name="163" /><span class="Maybe">     163:</span> <span class="f">#</span><span class="n">define</span> <a href="cpu.c_macros_noref.html#_WEFQSUNfREVTVF9DUFVTX01BU0tfMA__"><span class="b">XAPIC_DEST_CPUS_MASK</span></a>    <span class="f">(</span><span class="f">(</span><span class="c">1u</span> <span class="f">&lt;&lt;</span> <a href="cpu.c_macros_noref.html#_WEFQSUNfREVTVF9DUFVTX1NISUZUXzA_"><span class="b">XAPIC_DEST_CPUS_SHIFT</span></a><span class="f">)</span> <span class="f">-</span> <span class="c">1</span><span class="f">)</span>
<a name="164" /><span class="Maybe">     164:</span> <span class="f">#</span><span class="n">define</span> <a href="cpu.c_macros_noref.html#_WEFQSUNfREVTVF9DTFVTVEVSX01BU0tfMA__"><span class="b">XAPIC_DEST_CLUSTER_MASK</span></a>    <span class="f">(</span><a href="cpu.c_macros_noref.html#_WEFQSUNfREVTVF9DUFVTX01BU0tfMA__"><span class="b">XAPIC_DEST_CPUS_MASK</span></a> <span class="f">&lt;&lt;</span> <a href="cpu.c_macros_noref.html#_WEFQSUNfREVTVF9DUFVTX1NISUZUXzA_"><span class="b">XAPIC_DEST_CPUS_SHIFT</span></a><span class="f">)</span>
<a name="165" /><span class="Maybe">     165:</span> <span class="f">#</span><span class="n">define</span> <a href="cpu.c_macros_noref.html#_QVBJQ19DTFVTVEVSXzA_"><span class="b">APIC_CLUSTER</span></a><span class="f">(</span><span class="b">apicid</span><span class="f">)</span>    <span class="f">(</span><span class="f">(</span><span class="b">apicid</span><span class="f">)</span> <span class="f">&amp;</span> <a href="cpu.c_macros_noref.html#_WEFQSUNfREVTVF9DTFVTVEVSX01BU0tfMA__"><span class="b">XAPIC_DEST_CLUSTER_MASK</span></a><span class="f">)</span>
<a name="166" /><span class="Maybe">     166:</span> <span class="f">#</span><span class="n">define</span> <a href="cpu.c_macros_noref.html#_QVBJQ19DTFVTVEVSSURfMA__"><span class="b">APIC_CLUSTERID</span></a><span class="f">(</span><span class="b">apicid</span><span class="f">)</span>    <span class="f">(</span><a href="cpu.c_macros_noref.html#_QVBJQ19DTFVTVEVSXzA_"><span class="b">APIC_CLUSTER</span></a><span class="f">(</span><span class="b">apicid</span><span class="f">)</span> <span class="f">&gt;&gt;</span> <a href="cpu.c_macros_noref.html#_WEFQSUNfREVTVF9DUFVTX1NISUZUXzA_"><span class="b">XAPIC_DEST_CPUS_SHIFT</span></a><span class="f">)</span>
<a name="167" /><span class="Maybe">     167:</span> <span class="f">#</span><span class="n">define</span> <a href="cpu.c_macros_noref.html#_QVBJQ19DUFVJRF8w"><span class="b">APIC_CPUID</span></a><span class="f">(</span><span class="b">apicid</span><span class="f">)</span>    <span class="f">(</span><span class="f">(</span><span class="b">apicid</span><span class="f">)</span> <span class="f">&amp;</span> <a href="cpu.c_macros_noref.html#_WEFQSUNfREVTVF9DUFVTX01BU0tfMA__"><span class="b">XAPIC_DEST_CPUS_MASK</span></a><span class="f">)</span>
<a name="168" /><span class="Maybe">     168:</span> <span class="f">#</span><span class="n">define</span> <a href="cpu.c_macros_noref.html#_TlVNX0FQSUNfQ0xVU1RFUlNfMA__"><span class="b">NUM_APIC_CLUSTERS</span></a>    <span class="f">(</span><span class="f">(</span><a href="cpu.c_macros_ref.html#_QkFEX0FQSUNJRF8w"><span class="b">BAD_APICID</span></a> <span class="f">+</span> <span class="c">1</span><span class="f">)</span> <span class="f">&gt;&gt;</span> <a href="cpu.c_macros_noref.html#_WEFQSUNfREVTVF9DUFVTX1NISUZUXzA_"><span class="b">XAPIC_DEST_CPUS_SHIFT</span></a><span class="f">)</span>
<a name="169" /><span class="Maybe">     169:</span> 
<a name="170" /><span class="Maybe">     170:</span> <span class="k">/*</span>
<a name="171" /><span class="Maybe">     171:</span> <span class="k"> * the local APIC register structure, memory mapped. Not terribly well</span>
<a name="172" /><span class="Maybe">     172:</span> <span class="k"> * tested, but we might eventually use this one in the future - the</span>
<a name="173" /><span class="Maybe">     173:</span> <span class="k"> * problem why we cannot use it right now is the P5 APIC, it has an</span>
<a name="174" /><span class="Maybe">     174:</span> <span class="k"> * errata which cannot take 8-bit reads and writes, only 32-bit ones ...</span>
<a name="175" /><span class="Maybe">     175:</span> <span class="k"> */</span>
<a name="176" /><span class="Maybe">     176:</span> <span class="f">#</span><span class="n">define</span> <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="m">unsigned</span> <span class="m">int</span>
<a name="177" /><span class="Maybe">     177:</span> 
<a name="178" /><span class="Maybe">     178:</span> <span class="m">struct</span> <span class="b">local_apic</span> <span class="f">{</span>
<a name="179" /><span class="Maybe">     179:</span> 
<a name="180" /><span class="Maybe">     180:</span> <span class="k">/*000*/</span>    <span class="m">struct</span> <span class="f">{</span> <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved</span><span class="f">[</span><span class="c">4</span><span class="f">]</span><span class="f">;</span> <span class="f">}</span> <span class="b">__reserved_01</span><span class="f">;</span>
<a name="181" /><span class="Maybe">     181:</span> 
<a name="182" /><span class="Maybe">     182:</span> <span class="k">/*010*/</span>    <span class="m">struct</span> <span class="f">{</span> <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved</span><span class="f">[</span><span class="c">4</span><span class="f">]</span><span class="f">;</span> <span class="f">}</span> <span class="b">__reserved_02</span><span class="f">;</span>
<a name="183" /><span class="Maybe">     183:</span> 
<a name="184" /><span class="Maybe">     184:</span> <span class="k">/*020*/</span>    <span class="m">struct</span> <span class="f">{</span> <span class="k">/* APIC ID Register */</span>
<a name="185" /><span class="Maybe">     185:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a>   <span class="b">__reserved_1</span>    <span class="f">:</span> <span class="c">24</span><span class="f">,</span>
<a name="186" /><span class="Maybe">     186:</span>             <span class="b">phys_apic_id</span>    <span class="f">:</span>  <span class="c">4</span><span class="f">,</span>
<a name="187" /><span class="Maybe">     187:</span>             <span class="b">__reserved_2</span>    <span class="f">:</span>  <span class="c">4</span><span class="f">;</span>
<a name="188" /><span class="Maybe">     188:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved</span><span class="f">[</span><span class="c">3</span><span class="f">]</span><span class="f">;</span>
<a name="189" /><span class="Maybe">     189:</span>     <span class="f">}</span> <span class="b">id</span><span class="f">;</span>
<a name="190" /><span class="Maybe">     190:</span> 
<a name="191" /><span class="Maybe">     191:</span> <span class="k">/*030*/</span>    <span class="m">const</span>
<a name="192" /><span class="Maybe">     192:</span>     <span class="m">struct</span> <span class="f">{</span> <span class="k">/* APIC Version Register */</span>
<a name="193" /><span class="Maybe">     193:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a>   <span class="b">version</span>        <span class="f">:</span>  <span class="c">8</span><span class="f">,</span>
<a name="194" /><span class="Maybe">     194:</span>             <span class="b">__reserved_1</span>    <span class="f">:</span>  <span class="c">8</span><span class="f">,</span>
<a name="195" /><span class="Maybe">     195:</span>             <span class="b">max_lvt</span>        <span class="f">:</span>  <span class="c">8</span><span class="f">,</span>
<a name="196" /><span class="Maybe">     196:</span>             <span class="b">__reserved_2</span>    <span class="f">:</span>  <span class="c">8</span><span class="f">;</span>
<a name="197" /><span class="Maybe">     197:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved</span><span class="f">[</span><span class="c">3</span><span class="f">]</span><span class="f">;</span>
<a name="198" /><span class="Maybe">     198:</span>     <span class="f">}</span> <span class="b">version</span><span class="f">;</span>
<a name="199" /><span class="Maybe">     199:</span> 
<a name="200" /><span class="Maybe">     200:</span> <span class="k">/*040*/</span>    <span class="m">struct</span> <span class="f">{</span> <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved</span><span class="f">[</span><span class="c">4</span><span class="f">]</span><span class="f">;</span> <span class="f">}</span> <span class="b">__reserved_03</span><span class="f">;</span>
<a name="201" /><span class="Maybe">     201:</span> 
<a name="202" /><span class="Maybe">     202:</span> <span class="k">/*050*/</span>    <span class="m">struct</span> <span class="f">{</span> <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved</span><span class="f">[</span><span class="c">4</span><span class="f">]</span><span class="f">;</span> <span class="f">}</span> <span class="b">__reserved_04</span><span class="f">;</span>
<a name="203" /><span class="Maybe">     203:</span> 
<a name="204" /><span class="Maybe">     204:</span> <span class="k">/*060*/</span>    <span class="m">struct</span> <span class="f">{</span> <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved</span><span class="f">[</span><span class="c">4</span><span class="f">]</span><span class="f">;</span> <span class="f">}</span> <span class="b">__reserved_05</span><span class="f">;</span>
<a name="205" /><span class="Maybe">     205:</span> 
<a name="206" /><span class="Maybe">     206:</span> <span class="k">/*070*/</span>    <span class="m">struct</span> <span class="f">{</span> <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved</span><span class="f">[</span><span class="c">4</span><span class="f">]</span><span class="f">;</span> <span class="f">}</span> <span class="b">__reserved_06</span><span class="f">;</span>
<a name="207" /><span class="Maybe">     207:</span> 
<a name="208" /><span class="Maybe">     208:</span> <span class="k">/*080*/</span>    <span class="m">struct</span> <span class="f">{</span> <span class="k">/* Task Priority Register */</span>
<a name="209" /><span class="Maybe">     209:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a>   <span class="b">priority</span>    <span class="f">:</span>  <span class="c">8</span><span class="f">,</span>
<a name="210" /><span class="Maybe">     210:</span>             <span class="b">__reserved_1</span>    <span class="f">:</span> <span class="c">24</span><span class="f">;</span>
<a name="211" /><span class="Maybe">     211:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved_2</span><span class="f">[</span><span class="c">3</span><span class="f">]</span><span class="f">;</span>
<a name="212" /><span class="Maybe">     212:</span>     <span class="f">}</span> <span class="b">tpr</span><span class="f">;</span>
<a name="213" /><span class="Maybe">     213:</span> 
<a name="214" /><span class="Maybe">     214:</span> <span class="k">/*090*/</span>    <span class="m">const</span>
<a name="215" /><span class="Maybe">     215:</span>     <span class="m">struct</span> <span class="f">{</span> <span class="k">/* Arbitration Priority Register */</span>
<a name="216" /><span class="Maybe">     216:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a>   <span class="b">priority</span>    <span class="f">:</span>  <span class="c">8</span><span class="f">,</span>
<a name="217" /><span class="Maybe">     217:</span>             <span class="b">__reserved_1</span>    <span class="f">:</span> <span class="c">24</span><span class="f">;</span>
<a name="218" /><span class="Maybe">     218:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved_2</span><span class="f">[</span><span class="c">3</span><span class="f">]</span><span class="f">;</span>
<a name="219" /><span class="Maybe">     219:</span>     <span class="f">}</span> <span class="b">apr</span><span class="f">;</span>
<a name="220" /><span class="Maybe">     220:</span> 
<a name="221" /><span class="Maybe">     221:</span> <span class="k">/*0A0*/</span>    <span class="m">const</span>
<a name="222" /><span class="Maybe">     222:</span>     <span class="m">struct</span> <span class="f">{</span> <span class="k">/* Processor Priority Register */</span>
<a name="223" /><span class="Maybe">     223:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a>   <span class="b">priority</span>    <span class="f">:</span>  <span class="c">8</span><span class="f">,</span>
<a name="224" /><span class="Maybe">     224:</span>             <span class="b">__reserved_1</span>    <span class="f">:</span> <span class="c">24</span><span class="f">;</span>
<a name="225" /><span class="Maybe">     225:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved_2</span><span class="f">[</span><span class="c">3</span><span class="f">]</span><span class="f">;</span>
<a name="226" /><span class="Maybe">     226:</span>     <span class="f">}</span> <span class="b">ppr</span><span class="f">;</span>
<a name="227" /><span class="Maybe">     227:</span> 
<a name="228" /><span class="Maybe">     228:</span> <span class="k">/*0B0*/</span>    <span class="m">struct</span> <span class="f">{</span> <span class="k">/* End Of Interrupt Register */</span>
<a name="229" /><span class="Maybe">     229:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a>   <span class="b">eoi</span><span class="f">;</span>
<a name="230" /><span class="Maybe">     230:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved</span><span class="f">[</span><span class="c">3</span><span class="f">]</span><span class="f">;</span>
<a name="231" /><span class="Maybe">     231:</span>     <span class="f">}</span> <span class="b">eoi</span><span class="f">;</span>
<a name="232" /><span class="Maybe">     232:</span> 
<a name="233" /><span class="Maybe">     233:</span> <span class="k">/*0C0*/</span>    <span class="m">struct</span> <span class="f">{</span> <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved</span><span class="f">[</span><span class="c">4</span><span class="f">]</span><span class="f">;</span> <span class="f">}</span> <span class="b">__reserved_07</span><span class="f">;</span>
<a name="234" /><span class="Maybe">     234:</span> 
<a name="235" /><span class="Maybe">     235:</span> <span class="k">/*0D0*/</span>    <span class="m">struct</span> <span class="f">{</span> <span class="k">/* Logical Destination Register */</span>
<a name="236" /><span class="Maybe">     236:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a>   <span class="b">__reserved_1</span>    <span class="f">:</span> <span class="c">24</span><span class="f">,</span>
<a name="237" /><span class="Maybe">     237:</span>             <span class="b">logical_dest</span>    <span class="f">:</span>  <span class="c">8</span><span class="f">;</span>
<a name="238" /><span class="Maybe">     238:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved_2</span><span class="f">[</span><span class="c">3</span><span class="f">]</span><span class="f">;</span>
<a name="239" /><span class="Maybe">     239:</span>     <span class="f">}</span> <span class="b">ldr</span><span class="f">;</span>
<a name="240" /><span class="Maybe">     240:</span> 
<a name="241" /><span class="Maybe">     241:</span> <span class="k">/*0E0*/</span>    <span class="m">struct</span> <span class="f">{</span> <span class="k">/* Destination Format Register */</span>
<a name="242" /><span class="Maybe">     242:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a>   <span class="b">__reserved_1</span>    <span class="f">:</span> <span class="c">28</span><span class="f">,</span>
<a name="243" /><span class="Maybe">     243:</span>             <span class="b">model</span>        <span class="f">:</span>  <span class="c">4</span><span class="f">;</span>
<a name="244" /><span class="Maybe">     244:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved_2</span><span class="f">[</span><span class="c">3</span><span class="f">]</span><span class="f">;</span>
<a name="245" /><span class="Maybe">     245:</span>     <span class="f">}</span> <span class="b">dfr</span><span class="f">;</span>
<a name="246" /><span class="Maybe">     246:</span> 
<a name="247" /><span class="Maybe">     247:</span> <span class="k">/*0F0*/</span>    <span class="m">struct</span> <span class="f">{</span> <span class="k">/* Spurious Interrupt Vector Register */</span>
<a name="248" /><span class="Maybe">     248:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a>    <span class="b">spurious_vector</span>    <span class="f">:</span>  <span class="c">8</span><span class="f">,</span>
<a name="249" /><span class="Maybe">     249:</span>             <span class="b">apic_enabled</span>    <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="250" /><span class="Maybe">     250:</span>             <span class="b">focus_cpu</span>    <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="251" /><span class="Maybe">     251:</span>             <span class="b">__reserved_2</span>    <span class="f">:</span> <span class="c">22</span><span class="f">;</span>
<a name="252" /><span class="Maybe">     252:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved_3</span><span class="f">[</span><span class="c">3</span><span class="f">]</span><span class="f">;</span>
<a name="253" /><span class="Maybe">     253:</span>     <span class="f">}</span> <span class="b">svr</span><span class="f">;</span>
<a name="254" /><span class="Maybe">     254:</span> 
<a name="255" /><span class="Maybe">     255:</span> <span class="k">/*100*/</span>    <span class="m">struct</span> <span class="f">{</span> <span class="k">/* In Service Register */</span>
<a name="256" /><span class="Maybe">     256:</span> <span class="k">/*170*/</span>        <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">bitfield</span><span class="f">;</span>
<a name="257" /><span class="Maybe">     257:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved</span><span class="f">[</span><span class="c">3</span><span class="f">]</span><span class="f">;</span>
<a name="258" /><span class="Maybe">     258:</span>     <span class="f">}</span> <span class="b">isr</span> <span class="f">[</span><span class="c">8</span><span class="f">]</span><span class="f">;</span>
<a name="259" /><span class="Maybe">     259:</span> 
<a name="260" /><span class="Maybe">     260:</span> <span class="k">/*180*/</span>    <span class="m">struct</span> <span class="f">{</span> <span class="k">/* Trigger Mode Register */</span>
<a name="261" /><span class="Maybe">     261:</span> <span class="k">/*1F0*/</span>        <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">bitfield</span><span class="f">;</span>
<a name="262" /><span class="Maybe">     262:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved</span><span class="f">[</span><span class="c">3</span><span class="f">]</span><span class="f">;</span>
<a name="263" /><span class="Maybe">     263:</span>     <span class="f">}</span> <span class="b">tmr</span> <span class="f">[</span><span class="c">8</span><span class="f">]</span><span class="f">;</span>
<a name="264" /><span class="Maybe">     264:</span> 
<a name="265" /><span class="Maybe">     265:</span> <span class="k">/*200*/</span>    <span class="m">struct</span> <span class="f">{</span> <span class="k">/* Interrupt Request Register */</span>
<a name="266" /><span class="Maybe">     266:</span> <span class="k">/*270*/</span>        <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">bitfield</span><span class="f">;</span>
<a name="267" /><span class="Maybe">     267:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved</span><span class="f">[</span><span class="c">3</span><span class="f">]</span><span class="f">;</span>
<a name="268" /><span class="Maybe">     268:</span>     <span class="f">}</span> <span class="b">irr</span> <span class="f">[</span><span class="c">8</span><span class="f">]</span><span class="f">;</span>
<a name="269" /><span class="Maybe">     269:</span> 
<a name="270" /><span class="Maybe">     270:</span> <span class="k">/*280*/</span>    <span class="m">union</span> <span class="f">{</span> <span class="k">/* Error Status Register */</span>
<a name="271" /><span class="Maybe">     271:</span>         <span class="m">struct</span> <span class="f">{</span>
<a name="272" /><span class="Maybe">     272:</span>             <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a>   <span class="b">send_cs_error</span>            <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="273" /><span class="Maybe">     273:</span>                 <span class="b">receive_cs_error</span>        <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="274" /><span class="Maybe">     274:</span>                 <span class="b">send_accept_error</span>        <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="275" /><span class="Maybe">     275:</span>                 <span class="b">receive_accept_error</span>        <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="276" /><span class="Maybe">     276:</span>                 <span class="b">__reserved_1</span>            <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="277" /><span class="Maybe">     277:</span>                 <span class="b">send_illegal_vector</span>        <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="278" /><span class="Maybe">     278:</span>                 <span class="b">receive_illegal_vector</span>        <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="279" /><span class="Maybe">     279:</span>                 <span class="b">illegal_register_address</span>    <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="280" /><span class="Maybe">     280:</span>                 <span class="b">__reserved_2</span>            <span class="f">:</span> <span class="c">24</span><span class="f">;</span>
<a name="281" /><span class="Maybe">     281:</span>             <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved_3</span><span class="f">[</span><span class="c">3</span><span class="f">]</span><span class="f">;</span>
<a name="282" /><span class="Maybe">     282:</span>         <span class="f">}</span> <span class="b">error_bits</span><span class="f">;</span>
<a name="283" /><span class="Maybe">     283:</span>         <span class="m">struct</span> <span class="f">{</span>
<a name="284" /><span class="Maybe">     284:</span>             <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">errors</span><span class="f">;</span>
<a name="285" /><span class="Maybe">     285:</span>             <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved_3</span><span class="f">[</span><span class="c">3</span><span class="f">]</span><span class="f">;</span>
<a name="286" /><span class="Maybe">     286:</span>         <span class="f">}</span> <span class="b">all_errors</span><span class="f">;</span>
<a name="287" /><span class="Maybe">     287:</span>     <span class="f">}</span> <span class="b">esr</span><span class="f">;</span>
<a name="288" /><span class="Maybe">     288:</span> 
<a name="289" /><span class="Maybe">     289:</span> <span class="k">/*290*/</span>    <span class="m">struct</span> <span class="f">{</span> <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved</span><span class="f">[</span><span class="c">4</span><span class="f">]</span><span class="f">;</span> <span class="f">}</span> <span class="b">__reserved_08</span><span class="f">;</span>
<a name="290" /><span class="Maybe">     290:</span> 
<a name="291" /><span class="Maybe">     291:</span> <span class="k">/*2A0*/</span>    <span class="m">struct</span> <span class="f">{</span> <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved</span><span class="f">[</span><span class="c">4</span><span class="f">]</span><span class="f">;</span> <span class="f">}</span> <span class="b">__reserved_09</span><span class="f">;</span>
<a name="292" /><span class="Maybe">     292:</span> 
<a name="293" /><span class="Maybe">     293:</span> <span class="k">/*2B0*/</span>    <span class="m">struct</span> <span class="f">{</span> <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved</span><span class="f">[</span><span class="c">4</span><span class="f">]</span><span class="f">;</span> <span class="f">}</span> <span class="b">__reserved_10</span><span class="f">;</span>
<a name="294" /><span class="Maybe">     294:</span> 
<a name="295" /><span class="Maybe">     295:</span> <span class="k">/*2C0*/</span>    <span class="m">struct</span> <span class="f">{</span> <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved</span><span class="f">[</span><span class="c">4</span><span class="f">]</span><span class="f">;</span> <span class="f">}</span> <span class="b">__reserved_11</span><span class="f">;</span>
<a name="296" /><span class="Maybe">     296:</span> 
<a name="297" /><span class="Maybe">     297:</span> <span class="k">/*2D0*/</span>    <span class="m">struct</span> <span class="f">{</span> <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved</span><span class="f">[</span><span class="c">4</span><span class="f">]</span><span class="f">;</span> <span class="f">}</span> <span class="b">__reserved_12</span><span class="f">;</span>
<a name="298" /><span class="Maybe">     298:</span> 
<a name="299" /><span class="Maybe">     299:</span> <span class="k">/*2E0*/</span>    <span class="m">struct</span> <span class="f">{</span> <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved</span><span class="f">[</span><span class="c">4</span><span class="f">]</span><span class="f">;</span> <span class="f">}</span> <span class="b">__reserved_13</span><span class="f">;</span>
<a name="300" /><span class="Maybe">     300:</span> 
<a name="301" /><span class="Maybe">     301:</span> <span class="k">/*2F0*/</span>    <span class="m">struct</span> <span class="f">{</span> <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved</span><span class="f">[</span><span class="c">4</span><span class="f">]</span><span class="f">;</span> <span class="f">}</span> <span class="b">__reserved_14</span><span class="f">;</span>
<a name="302" /><span class="Maybe">     302:</span> 
<a name="303" /><span class="Maybe">     303:</span> <span class="k">/*300*/</span>    <span class="m">struct</span> <span class="f">{</span> <span class="k">/* Interrupt Command Register 1 */</span>
<a name="304" /><span class="Maybe">     304:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a>   <span class="b">vector</span>            <span class="f">:</span>  <span class="c">8</span><span class="f">,</span>
<a name="305" /><span class="Maybe">     305:</span>             <span class="b">delivery_mode</span>        <span class="f">:</span>  <span class="c">3</span><span class="f">,</span>
<a name="306" /><span class="Maybe">     306:</span>             <span class="b">destination_mode</span>    <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="307" /><span class="Maybe">     307:</span>             <span class="b">delivery_status</span>        <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="308" /><span class="Maybe">     308:</span>             <span class="b">__reserved_1</span>        <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="309" /><span class="Maybe">     309:</span>             <span class="b">level</span>            <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="310" /><span class="Maybe">     310:</span>             <span class="b">trigger</span>            <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="311" /><span class="Maybe">     311:</span>             <span class="b">__reserved_2</span>        <span class="f">:</span>  <span class="c">2</span><span class="f">,</span>
<a name="312" /><span class="Maybe">     312:</span>             <span class="b">shorthand</span>        <span class="f">:</span>  <span class="c">2</span><span class="f">,</span>
<a name="313" /><span class="Maybe">     313:</span>             <span class="b">__reserved_3</span>        <span class="f">:</span>  <span class="c">12</span><span class="f">;</span>
<a name="314" /><span class="Maybe">     314:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved_4</span><span class="f">[</span><span class="c">3</span><span class="f">]</span><span class="f">;</span>
<a name="315" /><span class="Maybe">     315:</span>     <span class="f">}</span> <span class="b">icr1</span><span class="f">;</span>
<a name="316" /><span class="Maybe">     316:</span> 
<a name="317" /><span class="Maybe">     317:</span> <span class="k">/*310*/</span>    <span class="m">struct</span> <span class="f">{</span> <span class="k">/* Interrupt Command Register 2 */</span>
<a name="318" /><span class="Maybe">     318:</span>         <span class="m">union</span> <span class="f">{</span>
<a name="319" /><span class="Maybe">     319:</span>             <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a>   <span class="b">__reserved_1</span>    <span class="f">:</span> <span class="c">24</span><span class="f">,</span>
<a name="320" /><span class="Maybe">     320:</span>                 <span class="b">phys_dest</span>    <span class="f">:</span>  <span class="c">4</span><span class="f">,</span>
<a name="321" /><span class="Maybe">     321:</span>                 <span class="b">__reserved_2</span>    <span class="f">:</span>  <span class="c">4</span><span class="f">;</span>
<a name="322" /><span class="Maybe">     322:</span>             <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a>   <span class="b">__reserved_3</span>    <span class="f">:</span> <span class="c">24</span><span class="f">,</span>
<a name="323" /><span class="Maybe">     323:</span>                 <span class="b">logical_dest</span>    <span class="f">:</span>  <span class="c">8</span><span class="f">;</span>
<a name="324" /><span class="Maybe">     324:</span>         <span class="f">}</span> <span class="b">dest</span><span class="f">;</span>
<a name="325" /><span class="Maybe">     325:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved_4</span><span class="f">[</span><span class="c">3</span><span class="f">]</span><span class="f">;</span>
<a name="326" /><span class="Maybe">     326:</span>     <span class="f">}</span> <span class="b">icr2</span><span class="f">;</span>
<a name="327" /><span class="Maybe">     327:</span> 
<a name="328" /><span class="Maybe">     328:</span> <span class="k">/*320*/</span>    <span class="m">struct</span> <span class="f">{</span> <span class="k">/* LVT - Timer */</span>
<a name="329" /><span class="Maybe">     329:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a>   <span class="b">vector</span>        <span class="f">:</span>  <span class="c">8</span><span class="f">,</span>
<a name="330" /><span class="Maybe">     330:</span>             <span class="b">__reserved_1</span>    <span class="f">:</span>  <span class="c">4</span><span class="f">,</span>
<a name="331" /><span class="Maybe">     331:</span>             <span class="b">delivery_status</span>    <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="332" /><span class="Maybe">     332:</span>             <span class="b">__reserved_2</span>    <span class="f">:</span>  <span class="c">3</span><span class="f">,</span>
<a name="333" /><span class="Maybe">     333:</span>             <span class="b">mask</span>        <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="334" /><span class="Maybe">     334:</span>             <span class="b">timer_mode</span>    <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="335" /><span class="Maybe">     335:</span>             <span class="b">__reserved_3</span>    <span class="f">:</span> <span class="c">14</span><span class="f">;</span>
<a name="336" /><span class="Maybe">     336:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved_4</span><span class="f">[</span><span class="c">3</span><span class="f">]</span><span class="f">;</span>
<a name="337" /><span class="Maybe">     337:</span>     <span class="f">}</span> <span class="b">lvt_timer</span><span class="f">;</span>
<a name="338" /><span class="Maybe">     338:</span> 
<a name="339" /><span class="Maybe">     339:</span> <span class="k">/*330*/</span>    <span class="m">struct</span> <span class="f">{</span> <span class="k">/* LVT - Thermal Sensor */</span>
<a name="340" /><span class="Maybe">     340:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a>  <span class="b">vector</span>        <span class="f">:</span>  <span class="c">8</span><span class="f">,</span>
<a name="341" /><span class="Maybe">     341:</span>             <span class="b">delivery_mode</span>    <span class="f">:</span>  <span class="c">3</span><span class="f">,</span>
<a name="342" /><span class="Maybe">     342:</span>             <span class="b">__reserved_1</span>    <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="343" /><span class="Maybe">     343:</span>             <span class="b">delivery_status</span>    <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="344" /><span class="Maybe">     344:</span>             <span class="b">__reserved_2</span>    <span class="f">:</span>  <span class="c">3</span><span class="f">,</span>
<a name="345" /><span class="Maybe">     345:</span>             <span class="b">mask</span>        <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="346" /><span class="Maybe">     346:</span>             <span class="b">__reserved_3</span>    <span class="f">:</span> <span class="c">15</span><span class="f">;</span>
<a name="347" /><span class="Maybe">     347:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved_4</span><span class="f">[</span><span class="c">3</span><span class="f">]</span><span class="f">;</span>
<a name="348" /><span class="Maybe">     348:</span>     <span class="f">}</span> <span class="b">lvt_thermal</span><span class="f">;</span>
<a name="349" /><span class="Maybe">     349:</span> 
<a name="350" /><span class="Maybe">     350:</span> <span class="k">/*340*/</span>    <span class="m">struct</span> <span class="f">{</span> <span class="k">/* LVT - Performance Counter */</span>
<a name="351" /><span class="Maybe">     351:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a>   <span class="b">vector</span>        <span class="f">:</span>  <span class="c">8</span><span class="f">,</span>
<a name="352" /><span class="Maybe">     352:</span>             <span class="b">delivery_mode</span>    <span class="f">:</span>  <span class="c">3</span><span class="f">,</span>
<a name="353" /><span class="Maybe">     353:</span>             <span class="b">__reserved_1</span>    <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="354" /><span class="Maybe">     354:</span>             <span class="b">delivery_status</span>    <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="355" /><span class="Maybe">     355:</span>             <span class="b">__reserved_2</span>    <span class="f">:</span>  <span class="c">3</span><span class="f">,</span>
<a name="356" /><span class="Maybe">     356:</span>             <span class="b">mask</span>        <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="357" /><span class="Maybe">     357:</span>             <span class="b">__reserved_3</span>    <span class="f">:</span> <span class="c">15</span><span class="f">;</span>
<a name="358" /><span class="Maybe">     358:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved_4</span><span class="f">[</span><span class="c">3</span><span class="f">]</span><span class="f">;</span>
<a name="359" /><span class="Maybe">     359:</span>     <span class="f">}</span> <span class="b">lvt_pc</span><span class="f">;</span>
<a name="360" /><span class="Maybe">     360:</span> 
<a name="361" /><span class="Maybe">     361:</span> <span class="k">/*350*/</span>    <span class="m">struct</span> <span class="f">{</span> <span class="k">/* LVT - LINT0 */</span>
<a name="362" /><span class="Maybe">     362:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a>   <span class="b">vector</span>        <span class="f">:</span>  <span class="c">8</span><span class="f">,</span>
<a name="363" /><span class="Maybe">     363:</span>             <span class="b">delivery_mode</span>    <span class="f">:</span>  <span class="c">3</span><span class="f">,</span>
<a name="364" /><span class="Maybe">     364:</span>             <span class="b">__reserved_1</span>    <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="365" /><span class="Maybe">     365:</span>             <span class="b">delivery_status</span>    <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="366" /><span class="Maybe">     366:</span>             <span class="b">polarity</span>    <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="367" /><span class="Maybe">     367:</span>             <span class="b">remote_irr</span>    <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="368" /><span class="Maybe">     368:</span>             <span class="b">trigger</span>        <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="369" /><span class="Maybe">     369:</span>             <span class="b">mask</span>        <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="370" /><span class="Maybe">     370:</span>             <span class="b">__reserved_2</span>    <span class="f">:</span> <span class="c">15</span><span class="f">;</span>
<a name="371" /><span class="Maybe">     371:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved_3</span><span class="f">[</span><span class="c">3</span><span class="f">]</span><span class="f">;</span>
<a name="372" /><span class="Maybe">     372:</span>     <span class="f">}</span> <span class="b">lvt_lint0</span><span class="f">;</span>
<a name="373" /><span class="Maybe">     373:</span> 
<a name="374" /><span class="Maybe">     374:</span> <span class="k">/*360*/</span>    <span class="m">struct</span> <span class="f">{</span> <span class="k">/* LVT - LINT1 */</span>
<a name="375" /><span class="Maybe">     375:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a>   <span class="b">vector</span>        <span class="f">:</span>  <span class="c">8</span><span class="f">,</span>
<a name="376" /><span class="Maybe">     376:</span>             <span class="b">delivery_mode</span>    <span class="f">:</span>  <span class="c">3</span><span class="f">,</span>
<a name="377" /><span class="Maybe">     377:</span>             <span class="b">__reserved_1</span>    <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="378" /><span class="Maybe">     378:</span>             <span class="b">delivery_status</span>    <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="379" /><span class="Maybe">     379:</span>             <span class="b">polarity</span>    <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="380" /><span class="Maybe">     380:</span>             <span class="b">remote_irr</span>    <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="381" /><span class="Maybe">     381:</span>             <span class="b">trigger</span>        <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="382" /><span class="Maybe">     382:</span>             <span class="b">mask</span>        <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="383" /><span class="Maybe">     383:</span>             <span class="b">__reserved_2</span>    <span class="f">:</span> <span class="c">15</span><span class="f">;</span>
<a name="384" /><span class="Maybe">     384:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved_3</span><span class="f">[</span><span class="c">3</span><span class="f">]</span><span class="f">;</span>
<a name="385" /><span class="Maybe">     385:</span>     <span class="f">}</span> <span class="b">lvt_lint1</span><span class="f">;</span>
<a name="386" /><span class="Maybe">     386:</span> 
<a name="387" /><span class="Maybe">     387:</span> <span class="k">/*370*/</span>    <span class="m">struct</span> <span class="f">{</span> <span class="k">/* LVT - Error */</span>
<a name="388" /><span class="Maybe">     388:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a>   <span class="b">vector</span>        <span class="f">:</span>  <span class="c">8</span><span class="f">,</span>
<a name="389" /><span class="Maybe">     389:</span>             <span class="b">__reserved_1</span>    <span class="f">:</span>  <span class="c">4</span><span class="f">,</span>
<a name="390" /><span class="Maybe">     390:</span>             <span class="b">delivery_status</span>    <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="391" /><span class="Maybe">     391:</span>             <span class="b">__reserved_2</span>    <span class="f">:</span>  <span class="c">3</span><span class="f">,</span>
<a name="392" /><span class="Maybe">     392:</span>             <span class="b">mask</span>        <span class="f">:</span>  <span class="c">1</span><span class="f">,</span>
<a name="393" /><span class="Maybe">     393:</span>             <span class="b">__reserved_3</span>    <span class="f">:</span> <span class="c">15</span><span class="f">;</span>
<a name="394" /><span class="Maybe">     394:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved_4</span><span class="f">[</span><span class="c">3</span><span class="f">]</span><span class="f">;</span>
<a name="395" /><span class="Maybe">     395:</span>     <span class="f">}</span> <span class="b">lvt_error</span><span class="f">;</span>
<a name="396" /><span class="Maybe">     396:</span> 
<a name="397" /><span class="Maybe">     397:</span> <span class="k">/*380*/</span>    <span class="m">struct</span> <span class="f">{</span> <span class="k">/* Timer Initial Count Register */</span>
<a name="398" /><span class="Maybe">     398:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a>   <span class="b">initial_count</span><span class="f">;</span>
<a name="399" /><span class="Maybe">     399:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved_2</span><span class="f">[</span><span class="c">3</span><span class="f">]</span><span class="f">;</span>
<a name="400" /><span class="Maybe">     400:</span>     <span class="f">}</span> <span class="b">timer_icr</span><span class="f">;</span>
<a name="401" /><span class="Maybe">     401:</span> 
<a name="402" /><span class="Maybe">     402:</span> <span class="k">/*390*/</span>    <span class="m">const</span>
<a name="403" /><span class="Maybe">     403:</span>     <span class="m">struct</span> <span class="f">{</span> <span class="k">/* Timer Current Count Register */</span>
<a name="404" /><span class="Maybe">     404:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a>   <span class="b">curr_count</span><span class="f">;</span>
<a name="405" /><span class="Maybe">     405:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved_2</span><span class="f">[</span><span class="c">3</span><span class="f">]</span><span class="f">;</span>
<a name="406" /><span class="Maybe">     406:</span>     <span class="f">}</span> <span class="b">timer_ccr</span><span class="f">;</span>
<a name="407" /><span class="Maybe">     407:</span> 
<a name="408" /><span class="Maybe">     408:</span> <span class="k">/*3A0*/</span>    <span class="m">struct</span> <span class="f">{</span> <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved</span><span class="f">[</span><span class="c">4</span><span class="f">]</span><span class="f">;</span> <span class="f">}</span> <span class="b">__reserved_16</span><span class="f">;</span>
<a name="409" /><span class="Maybe">     409:</span> 
<a name="410" /><span class="Maybe">     410:</span> <span class="k">/*3B0*/</span>    <span class="m">struct</span> <span class="f">{</span> <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved</span><span class="f">[</span><span class="c">4</span><span class="f">]</span><span class="f">;</span> <span class="f">}</span> <span class="b">__reserved_17</span><span class="f">;</span>
<a name="411" /><span class="Maybe">     411:</span> 
<a name="412" /><span class="Maybe">     412:</span> <span class="k">/*3C0*/</span>    <span class="m">struct</span> <span class="f">{</span> <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved</span><span class="f">[</span><span class="c">4</span><span class="f">]</span><span class="f">;</span> <span class="f">}</span> <span class="b">__reserved_18</span><span class="f">;</span>
<a name="413" /><span class="Maybe">     413:</span> 
<a name="414" /><span class="Maybe">     414:</span> <span class="k">/*3D0*/</span>    <span class="m">struct</span> <span class="f">{</span> <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved</span><span class="f">[</span><span class="c">4</span><span class="f">]</span><span class="f">;</span> <span class="f">}</span> <span class="b">__reserved_19</span><span class="f">;</span>
<a name="415" /><span class="Maybe">     415:</span> 
<a name="416" /><span class="Maybe">     416:</span> <span class="k">/*3E0*/</span>    <span class="m">struct</span> <span class="f">{</span> <span class="k">/* Timer Divide Configuration Register */</span>
<a name="417" /><span class="Maybe">     417:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a>   <span class="b">divisor</span>        <span class="f">:</span>  <span class="c">4</span><span class="f">,</span>
<a name="418" /><span class="Maybe">     418:</span>             <span class="b">__reserved_1</span>    <span class="f">:</span> <span class="c">28</span><span class="f">;</span>
<a name="419" /><span class="Maybe">     419:</span>         <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved_2</span><span class="f">[</span><span class="c">3</span><span class="f">]</span><span class="f">;</span>
<a name="420" /><span class="Maybe">     420:</span>     <span class="f">}</span> <span class="b">timer_dcr</span><span class="f">;</span>
<a name="421" /><span class="Maybe">     421:</span> 
<a name="422" /><span class="Maybe">     422:</span> <span class="k">/*3F0*/</span>    <span class="m">struct</span> <span class="f">{</span> <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a> <span class="b">__reserved</span><span class="f">[</span><span class="c">4</span><span class="f">]</span><span class="f">;</span> <span class="f">}</span> <span class="b">__reserved_20</span><span class="f">;</span>
<a name="423" /><span class="Maybe">     423:</span> 
<a name="424" /><span class="Maybe">     424:</span> <span class="f">}</span> <span class="b">__attribute__</span> <span class="f">(</span><span class="f">(</span><span class="b">packed</span><span class="f">)</span><span class="f">)</span><span class="f">;</span>
<a name="425" /><span class="Maybe">     425:</span> 
<a name="426" /><span class="Maybe">     426:</span> <span class="f">#</span><span class="n">undef</span> <a href="cpu.c_macros_ref.html#_dTMyXzA_"><span class="b">u32</span></a>
<a name="427" /><span class="Maybe">     427:</span> 
<a name="428" /><span class="False">     428:</span> <span class="f">#</span><span class="n">ifdef</span> <span class="b">CONFIG_X86_32</span>
<a name="429" /><span class="False">     429:</span>  <span class="f">#</span><span class="n">define</span> <a href="cpu.c_macros_ref.html#_QkFEX0FQSUNJRF8w"><span class="b">BAD_APICID</span></a> <span class="c">0xFFu</span>
<a name="430" /><span class="Maybe">     430:</span> <span class="f">#</span><span class="n">else</span>
<a name="431" /><span class="Maybe">     431:</span>  <span class="f">#</span><span class="n">define</span> <a href="cpu.c_macros_ref.html#_QkFEX0FQSUNJRF8w"><span class="b">BAD_APICID</span></a> <span class="c">0xFFFFu</span>
<a name="432" /><span class="Maybe">     432:</span> <span class="f">#</span><span class="n">endif</span>
<a name="433" /><span class="Maybe">     433:</span> 
<a name="434" /><span class="Maybe">     434:</span> <span class="m">enum</span> <span class="b">ioapic_irq_destination_types</span> <span class="f">{</span>
<a name="435" /><span class="Maybe">     435:</span>     <span class="b">dest_Fixed</span>        <span class="f">=</span> <span class="c">0</span><span class="f">,</span>
<a name="436" /><span class="Maybe">     436:</span>     <span class="b">dest_LowestPrio</span>        <span class="f">=</span> <span class="c">1</span><span class="f">,</span>
<a name="437" /><span class="Maybe">     437:</span>     <span class="b">dest_SMI</span>        <span class="f">=</span> <span class="c">2</span><span class="f">,</span>
<a name="438" /><span class="Maybe">     438:</span>     <span class="b">dest__reserved_1</span>    <span class="f">=</span> <span class="c">3</span><span class="f">,</span>
<a name="439" /><span class="Maybe">     439:</span>     <span class="b">dest_NMI</span>        <span class="f">=</span> <span class="c">4</span><span class="f">,</span>
<a name="440" /><span class="Maybe">     440:</span>     <span class="b">dest_INIT</span>        <span class="f">=</span> <span class="c">5</span><span class="f">,</span>
<a name="441" /><span class="Maybe">     441:</span>     <span class="b">dest__reserved_2</span>    <span class="f">=</span> <span class="c">6</span><span class="f">,</span>
<a name="442" /><span class="Maybe">     442:</span>     <span class="b">dest_ExtINT</span>        <span class="f">=</span> <span class="c">7</span>
<a name="443" /><span class="Maybe">     443:</span> <span class="f">}</span><span class="f">;</span>
<a name="444" /><span class="Maybe">     444:</span> 
<a name="445" /><span class="True">     445:</span> <span class="f">#</span><span class="n">endif</span> <span class="k">/* _ASM_X86_APICDEF_H */</span>
<a name="446" /><span class="True">     446:</span> </pre>
  </body>
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